Yaskawa F7 Drive User Manual User Manual download pdf (Page 225)

Communications D - 6

Data

Configure consecutive data by combining the storage register address (test code for a loopback address) and the data the

Error Check

Errors are detected during communication using CRC-16. Perform calculations using the following method:

1. The factory setting for CRC-16 communication is typically zero, but when using the Modbus system, set the factory setting

to one (e.g., set all 16 bits to 1).

2. Calculate CRC-16 using MSB as slave address LSB, and LSB as the MSB of the final data.

3. Calculate CRC-16 for response messages from the slaves and compare them to the CRC-16 in the response messages.

CRC-16

At the end of the message, the data for CRC error checking is sent in order to detect errors in signal transmission. In Modbus

RTU, the error check is conducted in the form of a CRC-16 (Cyclical Redundancy Check). The CRC field checks the contents

of the entire message. It is applied regardless of any parity check method used for the individual characters of the message.

The CRC field is two bytes, containing 16-bit binary value. The CRC value is calculated by the transmitting device, which

appends the CRC to the message. The receiving device recalculates a CRC during receipt of the message, and compares the

calculated value to the actual value it received in the CRC field. If the two values are not equal, an error results.

The CRC is started by first preloading a 16-bit register to all 1’s. Then, a process begins of applying successive 8-bit bytes of

the message to the current contents of the register. Start and stop bits and the parity bit (if one is used) do not apply to the CRC.

During generation of the CRC, each 8-bit character is exclusive OR’ed with the register contents. Then the result is shifted in

the direction of the least significant bit (LSB), with a zero filled into the most significant bit (MSB) position. The LSB is

extracted and examined. If the LSB is a 1, the register is then exclusive OR’ed with a preset, fixed balue (A001h). If the LSB

is a 0, no exclusive OR takes place.

This process is repeated until eight shifts have been performed. After the last (eighth) shift, the next 8-bit byte is exclusive

OR’ed with the register’s current value, and the process repeats for eight more shifts as described above. The final contents of

the register, after all the bytes of the message have been applied, is the CRC value.

For applications using a host computer, detailed examples of a CRC generation using Quick Basic and in C are shown on the

following pages.

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Yaskawa F7 Drive User Manual User Manual Page 225